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SYLLABUS
SYLLABUS
MODULE 1 : Number system and codes
Binary and hexadecimal number systems; Methods of base conversions; Binary and hexadecimal arithmetic; Representation of signed numbers; Fixed and floating point numbers; Binary coded decimal codes; Gray codes; Excess 3 code. Alphanumeric codes: ASCII. Basics of verilog -- basic language elements: identifiers, data objects, scalar data types, operators.
This video covers syllabus overview and frequently asked questions
The above video is about syllabus overview and frequently asked questions Part 1 of ECT203 LOGIOC CIRCUIT DESIGN
The above video is about syllabus overview and frequently asked questions Part 2 of ECT203 LOGIOC CIRCUIT DESIGN
IMPORTANT TOPICS VEDIO LINK: www.youtube.com/watch?v=WC9O80f86-Q&list=PLU9qGTRXUDkn-2V_9IX14xLAC6IU43LDG&pp=gAQBiAQB
MODULE 1 VIDEO LINKS: www.youtube.com/watch?v=vCbu5DT7WAY&list=PLU9qGTRXUDkmZL5L1KqUnsWTwDfejrPg2
MODULE 2: Boolean Postulates and Fundamental Gates
MODULE 2: Boolean Postulates and Fundamental Gates
Boolean postulates and laws – Logic Functions and Gates De-Morgan’s Theorems, Principle of Duality, Minimization of Boolean expressions, Sum of Products (SOP), Product of Sums (POS), Canonical forms, Karnaugh map Minimization. Modeling in verilog, Implementation of gates with simple verilog codes.
MODULE 2 VIDEO LINKS: www.youtube.com/watch?v=vekIdqkTGfo&list=PLU9qGTRXUDkkqwS6_l5zx9kTkfq_eRNwS
MODULE :3 Combinatorial and Arithmetic Circuits
MODULE :3 Combinatorial and Arithmetic Circuits
Combinatorial Logic Systems - Comparators, Multiplexers, Demultiplexers, Encoder, Decoder. Half and Full Adders, Subtractors, Serial and Parallel Adders, BCD Adder. Modeling and simulation of combinatorial circuits with verilog codes at the gate level.
MODULE 3 VIDEO LINKS: www.youtube.com/watch?v=e_DxL2rTqAk&list=PLU9qGTRXUDkmPsLxtTXxIkVRM53Pnit-s
MODULE 4: Sequential Logic Circuits:
MODULE 4: Sequential Logic Circuits:
Building blocks like S-R, JK and Master-Slave JK FF, Edge triggered FF, Conversion of Flipflops, Excitation table and characteristic equation. Implementation with verilog codes. Ripple and Synchronous counters and implementation in verilog, Shift registers-SIPO, SISO, PISO, PIPO. Shift Registers with parallel Load/Shift, Ring counter and Johnsons counter. Asynchronous and Synchronous counter design, Mod N counter. Modeling and simulation of flipflops and counters in verilog.
MODULE 4 VIDEO LINKS: www.youtube.com/watch?v=29PsTpKs7fg&list=PLU9qGTRXUDklcJu14Q6sbBlhNQRce8DRB
MODULE 5: Logic families and its characteristics:
MODULE 5: Logic families and its characteristics:
TTL, ECL, CMOS - Electrical characteristics of logic gates – logic levels and noise margins, fan-out, propagation delay, transition time, power consumption and power-delay product. TTL inverter - circuit description and operation; CMOS inverter - circuit description and operation; Structure and operations of TTL and CMOS gates; NAND in TTL and CMOS, NAND and NOR in CMOS
MODULE 5 VIDEO LINKS: www.youtube.com/watch?v=qP6o_ysKKsA&list=PLU9qGTRXUDknKA0IdFVRq-AGw8qYwp_BH
IMPORTANT TOPICS LINKS
IMPORTANT TOPICS LINKS
S3 EC/AE 2019 scheme ECT203 LOGIC CIRCUIT DESIGN
https://youtube.com/playlist?list=PLU9qGTRXUDkn-2V_9IX14xLAC6IU43LDG
COUNTER DESIGN FULL PLAYLIST
https://youtube.com/playlist?list=PLU9qGTRXUDkmdJVc1J5u07mN8Jfa7O2BM
IMPORTANT VIDEO LINKS Asynchronous Counter Design PART 1 (all in one video )
Module 4 EC/AE Logic Circuit Design
Asynchronous Counter Design PART 2: Mod 16_ up counter, down counter, 3 bit up down counter, etc
Synchronous Counter Dessign full steps: Mod 3 counter. MODULE 4/ Logic Circuit Design (full eg)
K Map Simplification : Module 2:Previous 4 year KTU questions solved
K Map Simplification Part 2: POS & SOP Forms
Number Conversation & 2's complement method | Logic Circuit Design | Module 1 | KTU Model question
Module 5: TTL NAND (Totom pole ) working & explanation
SYLLABUS PDF:
PREVIOUS YEAR QUESTIONS
PREVIOUS YEAR QUESTIONS
DEC 2023 : drive.google.com/file/d/1IxpltV2hJDqLs5_5JotBpah3NcEISKMb/view?usp=sharing
DEC 2022: drive.google.com/file/d/1_ChWLpeMQQmHd2o95kHJ_6xJU3uZYwq1/view?usp=sharing
DEC 2021 : drive.google.com/file/d/1sbB5RZm_9CZLM9EKaol1hbaKHHjZB1hr/view?usp=sharing
DEC2020: drive.google.com/file/d/12dwxLSmbgAFBLVPxgctlrpKcHpr6BZKT/view?usp=sharing
Text Books
Text Books
1. Mano M.M., Ciletti M.D., “Digital Design”, Pearson India, 4th Edition. 2006
2. D.V. Hall, “Digital Circuits and Systems”, Tata McGraw Hill, 1989
3. S. Brown, Z. Vranesic, “Fundamentals of Digital Logic with Verilog Design”, McGraw Hill
4. Samir Palnikar“Verilog HDL: A Guide to Digital Design and Syntheis”, Sunsoft Press
5. R.P. Jain, “Modern digital Electronics”, Tata McGraw Hill, 4th edition, 2009
Reference Books
Reference Books
1. W.H. Gothmann, “Digital Electronics – An introduction to theory and practice”, PHI, 2nd edition ,2006
2. Wakerly J.F., “Digital Design: Principles and Practices,” Pearson India, 4th 2008
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3. A. Ananthakumar ,”Fundamentals of Digital Circuits”, Prentice Hall, 2nd edition, 2016
4. Fletcher, William I., An Engineering Approach to Digital Design, 1st Edition, Prentice Hall India, 1980
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DISCLAIMER
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